Design and analysis of high speed power efficient MOD-GDI logic based 4-BIT vedic multiplier using nikhilam sutra

Abstract

With the expansion of digital signal processing applications, the need for high-speed processing is increasing day by day. To achieve this goal, high-speed adders and multipliers (which form the fundamental module) are needed. Moreover, various types of applications require various performance features such as high speed, scalability, low power consumption, reconfiguration, less area, layout regularity, and one or more combinations of these parameters. The Vedic method of the ancient Indian mathematics based on sixteen Vedic formulae or aphorisms have attracted the attention of researchers in this regard which can offer faster multiplication operations. Urdhva Tiryagbhyam (UT) and Nikhilam are two important Sutras which can be used successfully to design high speed multipliers. Recognizing the correct Vedic formula and executing multiplication operations based on the selected formula can significantly improve the speed of the multiplier. The main purpose of this research work is to propose a multiplier that produces improved performance in terms of power consumption, delay, and area. Since the performance of the multiplier operations can be significantly influenced by the selected logic technique, the Modified-Gate-Diffusion-Input logic (MOD-GDI logic) is considered here to design various types of 4-bit multipliers. It is basically a low-power design logic technique, which can be used to perform any function, including low transistor count. The Nikhilam Sutra is suitable for larger number of multiplication operations. This sutra can be used for the multiplication very effectively to multiply numbers, around to the power of 10 bases (like 10, 100, 1000, etc). Hence this proposed work focuses on the design based on the realization of a high-speed as well as power-efficient 4-bit Vedic multiplier using Nikhilam Sutra based on the MOD-GDI logic. The design is carried out using T-Spice design tool and its performance has been analyzed in terms of power consumption, speed and area requirement as compared to UT multiplier and conventional Array multiplier. Moreover, the performance of Nikhilam multiplier is also analyzed using MATLAB platform considering the closeness of the multiplicand and the multiplier to the various bases.