Simulation based design of double gate TFET structure for better analog performance by gate metal work function modulation

Abstract

In this thesis, we have proposed a Double gate tunnel field-effect transistor (DG-TFET) to enhance the Analog/RF performance. The proposed structure has been optimized through simulations. The DG-TFET shows both point and line tun-neling. 2-D Simulations are carried out in Silvaco TCAD ATLAS tool using nonlocal band to band tunneling models. The optimized DG-TFET provides a low threshold voltage of 0.36 Volt, a low subthreshold swing (SS) of 17.55 mV/decade and a high ION /IOF F of 2.5 x 1012. Furthermore, the proposed device achieves a maximum transconductance, gm of 1.75 x10-4 S/μm, an electric field, EF of 1x107 V/m and a potential of 1.58 V. Here we shown, Design and Performance Investigation of Analog Performance of Double Gate TFET structure in this thesis.