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Please use this identifier to cite or link to this item: http://20.198.91.3:8080/jspui/handle/123456789/7269
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DC FieldValueLanguage
dc.contributor.advisorSarkar, Subir Kumar-
dc.contributor.authorDutta, Rounak-
dc.date.accessioned2025-02-07T11:07:30Z-
dc.date.available2025-02-07T11:07:30Z-
dc.date.issued2019-
dc.date.submitted2019-
dc.identifier.otherDC4777-
dc.identifier.urihttp://20.198.91.3:8080/jspui/handle/123456789/7269-
dc.format.extentxi, 74p.en_US
dc.language.isoenen_US
dc.publisherJadavpur University, Kolkata, West Bengalen_US
dc.subjectTunnel Field Effect Transistors (TFETs)en_US
dc.subjectMOSFETen_US
dc.titleOptimisation and analytical modelling of tunnel field effect transistor structures for low power applicationsen_US
dc.typeTexten_US
dc.departmentElectronics and Telecommunication Engineeringen_US
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