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http://20.198.91.3:8080/jspui/handle/123456789/6580Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.advisor | Sarkar, Subir Kumar | - |
| dc.contributor.author | Shome, Suvojijt | - |
| dc.date.accessioned | 2025-01-08T06:45:26Z | - |
| dc.date.available | 2025-01-08T06:45:26Z | - |
| dc.date.issued | 2019 | - |
| dc.date.submitted | 2019 | - |
| dc.identifier.uri | http://20.198.91.3:8080/jspui/handle/123456789/6580 | - |
| dc.format.extent | v, 109p. | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | Jadavpur University, Kolkata, West Bengal | en_US |
| dc.subject | CMOS | en_US |
| dc.subject | Logic Gate | en_US |
| dc.subject | VLSI | en_US |
| dc.title | Design 3 bit minnick counter using different kind of threshold logic | en_US |
| dc.type | Text | en_US |
| dc.department | Jadavpur University, Department of Electronics & Telecommunication Engineering | en_US |
| Appears in Collections: | Dissertations | |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| M.Tech(Department of Electronics & Telecommunication Engineering)Suvojijt Shome.pdf | 4.06 MB | Adobe PDF | View/Open |
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