Please use this identifier to cite or link to this item:
http://20.198.91.3:8080/jspui/handle/123456789/2797
Title: | Design and implementation of encoder decoder for LDPC (low density parity check-codes) |
Authors: | Shaw, Puja |
Advisors: | Naskar, Mrinal Kanti |
Keywords: | LDPC (low density parity check-codes);Error;Coding; Verilog;Field Programmable Gate Arrays(FGPA);Bit Flipping algorithm;Belief Propagation |
Issue Date: | 2016 |
Publisher: | Jadavpur University, Kolkata, West Bengal |
URI: | http://20.198.91.3:8080/jspui/handle/123456789/2797 |
Appears in Collections: | Dissertations |
Files in This Item:
File | Description | Size | Format | |
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M.E. (Electronics &Telecommunication Engineering) Puja Shaw.pdf | 3.96 MB | Adobe PDF | View/Open |
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