Please use this identifier to cite or link to this item:
http://20.198.91.3:8080/jspui/handle/123456789/2712| Title: | A new approach in design for manufacturing for nanoscale VLSI circuits |
| Authors: | Pal, Debasis |
| Advisors: | Das, Debesh Kumar |
| Keywords: | VLSI circuit;Nano scale VLSI circuits;Double Patterning Lithography (DPL);Triple Patterning Lithography (TPL);resolution enhancement technique (RET) |
| Issue Date: | 2016 |
| Publisher: | Jadavpur University, Kolkata, West Bengal |
| URI: | http://20.198.91.3:8080/jspui/handle/123456789/2712 |
| Appears in Collections: | Dissertations |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| M.E. (Computer Science & Engineering) Debasis Pal.pdf | 2.6 MB | Adobe PDF | View/Open |
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