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http://20.198.91.3:8080/jspui/handle/123456789/1659Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.advisor | Sanyal, Salil Kumar | - |
| dc.contributor.author | Upadhyaya, Bijoy Kumar | - |
| dc.date.accessioned | 2022-11-03T14:03:02Z | - |
| dc.date.available | 2022-11-03T14:03:02Z | - |
| dc.date.issued | 2015 | - |
| dc.date.submitted | 2017 | - |
| dc.identifier.other | TC2730 | - |
| dc.identifier.uri | http://localhost:8080/xmlui/handle/123456789/1659 | - |
| dc.format.extent | xxvii, 159p. | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | Jadavpur Univesity, Kolkata, West Bengal | en_US |
| dc.subject | Wireless Communication System | en_US |
| dc.subject | Orthogonal Frequency Division Multiplexing (OFDM) System | en_US |
| dc.subject | VHDL Model | en_US |
| dc.subject | FPGA Fundamentals | en_US |
| dc.subject | WLAN | en_US |
| dc.title | VHDL modeling and efficient FPGA implementation of some interleavers for applications in OFDM based wireless communication systems | en_US |
| dc.type | Text | en_US |
| dc.department | Jadavpur Univesity. Department of Electronics and Telecommunication Engineering | en_US |
| Appears in Collections: | Ph.D. Theses | |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| Phd thesis (ETCE) Bijoy Kumar Upadhyaya.pdf | 11.05 MB | Adobe PDF | View/Open | |
| Abstract (Bijoy Kumar Upadhyaya).pdf | 169.8 kB | Adobe PDF | View/Open |
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