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http://20.198.91.3:8080/jspui/handle/123456789/1659| Title: | VHDL modeling and efficient FPGA implementation of some interleavers for applications in OFDM based wireless communication systems |
| Authors: | Upadhyaya, Bijoy Kumar |
| Advisors: | Sanyal, Salil Kumar |
| Keywords: | Wireless Communication System;Orthogonal Frequency Division Multiplexing (OFDM) System;VHDL Model;FPGA Fundamentals;WLAN |
| Issue Date: | 2015 |
| Publisher: | Jadavpur Univesity, Kolkata, West Bengal |
| URI: | http://localhost:8080/xmlui/handle/123456789/1659 |
| Appears in Collections: | Ph.D. Theses |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| Phd thesis (ETCE) Bijoy Kumar Upadhyaya.pdf | 11.05 MB | Adobe PDF | View/Open | |
| Abstract (Bijoy Kumar Upadhyaya).pdf | 169.8 kB | Adobe PDF | View/Open |
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