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DC Field | Value | Language |
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dc.contributor.advisor | Sarkar, Subir Kumar | - |
dc.contributor.author | Bag, Joyashree | - |
dc.date.accessioned | 2022-11-01T09:34:33Z | - |
dc.date.available | 2022-11-01T09:34:33Z | - |
dc.date.issued | 2016 | - |
dc.date.submitted | 2017 | - |
dc.identifier.other | TC2716 | - |
dc.identifier.uri | http://localhost:8080/xmlui/handle/123456789/1627 | - |
dc.description.abstract | Abstract Advanced VLSI design using programmable logic devices and FPGAs is suitable to meet the new generation requirements due to their ability to take advantage of new process technologies and geometries. Wireless Communication is one of the most active areas of technology development of recent time, as it is rapidly changing with new features and technology. Wireless Communication today covers a very wide array of applications. Radio Frequency Identification technology and Wireless sensor Network systems are most important field of Wireless Communication system. The candidate has chosen the field of RFID and WSN as the areas of work to venture some Adaptive VLSI design. Hardware implementation up to RTL schematic level has been performed. In order to substantiate the design and real time verification, synthesizable modules are downloaded on the high performance FPGA kit. Designs are performed using high syntax VHDL code language and simulation results are obtained with Xilinx ISE 14.3 simulator. Virtex 5, Spartan 6 and Kintex-7 FPGA boards have been used as a hardware implementation platform. Performance evaluation and comparative study with related work is performed, wherever it is possible. Processor implementation for RFID based power saving appliance, Hardware implementation of anti-collision algorithm for RFID technology, FPGA realization of novel data security scheme for RFID, Power efficient FPGA based wireless sensor node implementation with efficient localization algorithm for large Wireless sensor network system and finally, low power, low cost CORDIC algorithm based DPSK modem realization with FPGA are the contribution of this research work and are described in this thesis. | en_US |
dc.format.extent | [xxviii], 174p. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Jadavpur Univesity, Kolkata, West Bengal | en_US |
dc.subject | Wireless Communication Systems | en_US |
dc.subject | Advanced VLSI design | en_US |
dc.subject | Radio Frequency Identification (RFID) | en_US |
dc.subject | Wireless sensor Network (WSN) | en_US |
dc.subject | FPGA | en_US |
dc.subject | VHDL | en_US |
dc.subject | EPC Gen protocol | en_US |
dc.subject | Elliptic curve cryptography (ECC) | en_US |
dc.title | Adaptive VLSI design for wireless communication systems | en_US |
dc.type | Text | en_US |
dc.department | Jadavpur Univesity. Department of Electronics and Telecommunication Engineering | en_US |
Appears in Collections: | Ph.D. Theses |
Files in This Item:
File | Description | Size | Format | |
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Phd thesis (ETCE) Joyashree Bag.pdf | 4.28 MB | Adobe PDF | View/Open |
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