Design of on-chip CMOS low-drop out voltage regulator

Abstract

Low dropout (LDO) voltage regulators are commonly used to power low-voltage digital circuits such as microprocessor cores. These digital circuits are typically constantly changing from one operating mode to another. Therefore, the load demands can change rapidly, resulting in large voltage spikes at the regulator's output that can adversely affect the digital circuitry Low dropout (LDO) voltage regulators are commonly used to power low-voltage digital circuits such as microprocessor cores. These digital circuits are typically constantly changing from one operating mode to another. Therefore, the load demands can change rapidly, resulting in large voltage spikes at the regulator's output that can adversely affect the digital circuitry. The main challenge in developing this type of regulator is to reduce quiescent current and achieve high current efficiency while ensuring good stability response and control performance. Therefore, various circuit techniques must be carefully added to compensate for the lack of large external capacitors and minimize the impact on system efficiency. This thesis focuses on developing a fully integrated low-dropout regulator with excellent dynamic performance, high regulation performance, and extremely low power consumption.