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DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Sarkar, Subir Kumar | - |
dc.contributor.author | Chakrabarti, Tapas | - |
dc.date.accessioned | 2022-09-06T10:25:40Z | - |
dc.date.available | 2022-09-06T10:25:40Z | - |
dc.date.issued | 2018 | - |
dc.date.submitted | 2019 | - |
dc.identifier.other | TC1825 | - |
dc.identifier.other | TH6456 | - |
dc.identifier.uri | http://localhost:8080/xmlui/handle/123456789/1024 | - |
dc.description.abstract | The minimization of device size and exploration of alternative energy are the demand of present world. Along with the genre of Mobile computing, smaller handy gadgets, more faster and efficient processors are the requirement of society and this leads towards the exploration into the field of nano-scale MOSFETs. In the same time the use of ‘solar energy’ through the ‘Photovoltaic solar cell’ is also the importunity of future life. To feed the demand of these, the device size miniaturization in case of ‘MOSFET’ or the ‘Solar cell structure’ is obvious. To incorporate billions of transistors in a single chip, the MOS devices are to be scaled to bring faster speed, but in the same time some unwanted effects do appear. The short channel effect is most prominent, which changes the threshold voltage, surface potential, electric field also. Hence the reliability study of MOS device is an important work which has been done in this research work. On the other hand c-Si solar cell is dominating the solar cell market. The c-Si solar cell efficiency is achieved up to 18% to 20%. To break through this efficiency level and to minimize the uses of c-silicon the ‘HIT solar cell’, ‘Dyesensitized solar cell’ ‘Perovskite solar cell’ new structures modeling have been done, as before fabrication modeling is an important step. In HIT solar cell proposed model the different layers are considered in nanoscale as the thinner layer produced more Voc, which enhanced the efficiency of 27.7%. In ‘Dyesensitized solar cell’ the nano crystalline semiconductors are used to attract broadband solar spectrum. In the newly modeled ‘Perovskite solar cell’ the layer of ZnTe is used as HTL whose thickness is 5nm and achieved a remarkable efficiency of 23.54%. The different models are carried out in this research work and achieved good results. At last, some swarm optimization techniques like ABC, FA and CS are applied in PV panels to derive the minimum duty cycle for the controller to extract the maximum power points and different electrical parameters. | en_US |
dc.format.extent | 164p. | en_US |
dc.language.iso | English | en_US |
dc.publisher | Jadavpur University, Kolkata, West Bengal | en_US |
dc.subject | Artificial Bee Colony (ABC), | en_US |
dc.subject | Automat FOR Simulation of Hetero-structures (AFORS-HET), | en_US |
dc.subject | Double Metal Double Gate Silicon On Nothing (DMDG), | en_US |
dc.subject | Dyesensitized Solar Cell (DSSC), | en_US |
dc.subject | Electron Transport Layer (ETL), | en_US |
dc.subject | Fill Factor (FF), | en_US |
dc.subject | Firefly Algorithm (FA), | en_US |
dc.subject | Hydrogenated amorphous Silicon (a-Si:H), | en_US |
dc.subject | Heterojunction Intrinsic Thin film (H-I-T), | en_US |
dc.subject | Hole Transport Layer (HTL), | en_US |
dc.subject | Photovoltaic (PV), | en_US |
dc.subject | Quantum Mechanical Effects (QME), | en_US |
dc.subject | Zinc Telluride(ZnTe), | en_US |
dc.title | Modeling and simulation of efficient nanoscale MOSFET and photovoltaic devices | en_US |
dc.type | Text | en_US |
dc.department | Jadavpur University, Electronics and Telecommunication Engineering | en_US |
Appears in Collections: | Ph.D. Theses |
Files in This Item:
File | Description | Size | Format | |
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PhD thesis (E.T.C.E.) Tapas Chakrabarti.pdf | 2.95 MB | Adobe PDF | View/Open |
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